This relates to solid-state image sensor arrays and, more specifically, to High Dynamic Range (HDR) complementary metal-oxide-semiconductor (CMOS) image sensor arrays that are illuminated from the back side of a substrate and that operate in a Global Shutter (GS) mode. Global shutter image sensors require additional charge storage nodes in each image sensor pixel, which consume a significant portion of the available pixel area and thus increases the cost of the image sensors. In HDR image sensors, this problem is further exacerbated due to an additional requirement to store a larger amount of charge in the pixels than in non-HDR image sensors.
Typical image sensors sense light by converting impinging photons into electrons (or holes) that are integrated (collected) in sensor pixels. Upon completion of each integration cycle, the collected charge is converted into voltage signals, which are supplied to corresponding output terminals associated with the image sensor. Typically, the charge-to-voltage conversion is performed directly within the pixels, and the resulting analog pixel voltage signals are transferred to the output terminals through various pixel addressing and scanning schemes. The analog voltage signal can be converted on-chip to a digital equivalent before being conveyed off-chip. Each pixel includes a buffer amplifier (i.e., source follower) that drives output sensing lines that are connected to the pixels via respective addressing transistors.
After the charge-to-voltage conversion is completed and after the resulting signals are transferred out from the pixels, the pixels are reset before a subsequent integration cycle begins. In pixels that include floating diffusions (FD) serving as the charge detection nodes, this reset operation is accomplished by momentarily turning on a reset transistor that connects the floating diffusion node to a voltage reference (typically the pixel current drain node) for draining (or removing) any charge transferred onto the FD node. However, removing charge from the floating diffusion node using the reset transistor generates thermal kTC-reset noise, as is well known in the art. This kTC reset noise must be removed using correlated double sampling (CDS) signal processing techniques in order to achieve desired low noise performance. Typical CMOS image sensors that utilize CDS require at least three (3T) four transistors (4T) per pixel.
Standard CMOS sensors cannot be used for global shutter operations, because the corresponding pixel array is scanned in a sequential mode row by row. Scanning the pixel array row by row generates undesirable time skew in the image. When performing global shutter operations, it is thus necessary to incorporate another storage site into each pixel that can store charge transferred from all the photodiodes in the pixel simultaneously at one time. Charge then waits in this storage site for the sequential scan in a row by row fashion.
It is difficult adapting this device concept for high-dynamic-range (HDR) operations, as a large amount of charge must be stored in the pixels. This problem is typically solved by assigning some sensor rows or pixels in a group of pixels a shorter integration time. However, this method sacrifices the low light level resolution of the image sensor and can cause problems for rapidly changing scene illuminations. Another method is using a logarithmic charge to voltage conversion characteristic that typically has higher noise, which also sacrifices low light level performance.
It would therefore be desirable to be able to provide improved image sensor pixels for a large range of illumination levels in a global shutter mode of operation.